SC427MLTRT【PDF 18/33 页】IC REG DL BUCK/LINEAR 32MLPQ

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SC417/SC427

the output of the switching regulator soft-discharges the

output into a 15& internal resistor via the V

OUT

pin. When

EN/PSV is allowed to float, the pin voltage will float to 33%

of the voltage at V5V. The switching regulator turns on

with power-save disabled and all switching is in forced

continuous mode.

When EN/PSV is high (above 44% of the voltage at V5V)

for SC417, the switching regulator turns on with ultra-

sonic power-save enabled. The SC417 ultra-sonic power-

save operation maintains a minimum switching frequency

of 25kHz, for applications with stringent audio

requirements.

When EN/PSV is high (above 44% of the voltage at V5V)

for SC427, the switching regulator turns on with power-

save enabled. The SC427 power-save operation is designed

to maximize efficiency at light loads with no minimum

frequency limits. This makes the SC427 an excellent choice

for portable and battery-operated systems.

Forced Continuous Mode Operation

The SC417/SC427 operates the switcher in Forced

Continuous Mode (FCM) by floating the EN/PSV pin (see

Figure 4). In this mode one of the power MOSFETs is

always on, with no intentional dead time other than to

avoid cross-conduction. This feature results in uniform

frequency across the full load range with the trade-off

being poor efficiency at light loads due to the high-fre-

quency switching of the MOSFETs.

FB Ripple

Voltage (V

)

FB threshold

Inductor

Current

DC Load Current

DH on-time is triggered when

reaches the FB Threshold.

(500mV)

On-time

)

DL drives high when on-time is completed.

DL remains high until V

falls to the FB threshold.

Figure 4 Forced Continuous Mode Operation

Ultra-sonic Power-save Operation (SC417)

The SC417 provides ultra-sonic power-save operation at

light loads, with the minimum operating frequency fixed

at 25kHz. This is accomplished using an internal timer that

monitors the time between consecutive high-side gate

pulses. If the time exceeds 40祍, DL drives high to turn the

low-side MOSFET on. This draws current from V

OUT

through

the inductor, forcing both V

OUT

and V

to fall. When V

drops to the 500mV threshold, the next DH on-time is trig-

gered. After the on-time is completed the high-side

MOSFET is turned off and the low-side MOSFET turns on.

The low-side MOSFET remains on until the inductor

current ramps down to zero, at which point the low-side

MOSFET is turned off.

Because the on-times are forced to occur at intervals no

greater than 40祍, the frequency will not fall below

~25kHz. Figure 5 shows ultra-sonic power-save

operation.

Applications Information (continued)

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